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on-chip electrostatic discharge protection design

  

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Experts in On-Chip Electrostatic Discharge Protection Design

The following experts are available as on-chip electrostatic discharge protection design consultants and on-chip electrostatic discharge protection design expert witnesses.  ORC experts are peer-recommended authorities who have been carefully selected and rigorously screened.
    Definition:  On-Chip Electrostatic Discharge Protection Design - The design of special circuits on the silicon die that will nondestructively absorb ESD transients.

Synonyms:  electrostatic circuit design, electrostatic clamp design, ESD circuit design, ESD clamp design, on-chip electrostatic discharge protection designing, on-chip ESD protection design, on-chip ESD protection designing

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Expert in Electronic Reliability & On-Chip ESD Protection
Expert currently works on predicting the electric breakdown of silicon dioxide gate dielectric. He is knowledgeable of the electric breakdown characteristics of silicon and air. Additionally, he has studied the effects of ... See full profile

Arizona (AZ), USA

 
 

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