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semiconductor wafer lapping


surface grinding


surface polishing


semiconductor wafer inspection


wafer surface


semiconductor wafer measurement


wafer carrier


silicon wafer slicing


semiconductor wafer processing


semiconductor wafer dicing


rapid thermal processing


semiconductor wafer polishing


chemical mechanical polishing


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semiconductor wafer


Semiconductor Wafer Lapping Experts

The following experts are available as semiconductor wafer lapping consultants and semiconductor wafer lapping expert witnesses.  ORC experts are peer-recommended authorities who have been carefully selected and rigorously screened.
    Definition:  Semiconductor Wafer Lapping - A surface grinding and polishing process by which a semiconductor wafer is ground to a very precise thickness and/or made very smooth.

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Semiconductor Wafer Lapping Experts
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Expert in Compound Semiconductors, Pure Metals
Semiconductor technology; bridgman technique; czochralski process. Expert has 25 years of experience in the growth, characterization, and fabrication (to wafers, etc.) of the infrared sensitive compound semiconductors, including InSb, ... See full profile


Expert in Microelectronic Processing and overall Supply Chain
Expert, Ph.D., has 15 years of experience working with world-class professionals in the electronic- material, device & systems industry. Expert was a process engineer in Micron's Strategic R&D Department in collaboration with Intel via IMFT, where he ... See full profile

Arizona (AZ), USA

Expert in Semiconductors, Including Laser, LED, Photovoltaics, Detectors, Epitaxy, Process, Nanotechnology
Expert has 20+ years eperience in compound semiconductor epitaxy, process and measurement, in particular with respect to optoelectronic devices (Laser, LED, photodectors, photovoltaics etc). Expert has published over 450 papers on ... See full profile

Derbyshire, United Kingdom

Expert in Microelectronics, Nanotechnology, Semiconductors, Memory
Expert has nearly 10 years of experience in solid state device development in a wide range of material systems. As a senior process engineer at Global Communication Semiconductors, he has provided internal advice about epitaxial layer selection from ... See full profile

California (CA), USA


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